A Programmable Pattern based Memory Controller.

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The electronic forum deals with the topics related to analog and digital circuits and systems (i.e. ASIC, FPGA, DSPs, Microcontroller, Single/Multi Processors, PCBs etc) and their programming such as HDL, C/C++, etc.

A Programmable Pattern based Memory Controller.

Unread postby UCERD.COM » Thu May 16, 2013 3:20 pm

This paper proposes a programmable memory controller, which has its own cache memory structure and exports an API that allows the access patterns of the program being executed to be communicated to the memory controller.
The controller provides a linker script which integrates with a compiler tool-chain and extracts the access patterns and program the APMC automatically.
The memory controller architecture uses descriptors generated by the memory access patterns found in code to help improve memory performance.
This pattern based approach supports both regular and irregular memory access patterns and shows performance improvement, 20x and 3.4x respectively.
The controller architecture also has a 34% reduction in static power usage and 50% reduction in hardware usage over the baseline system.

PPMC : A Programmable Pattern based Memory Controller. Hussain Tassadaq,Muhammad Shafiq, Miquel Pericas, Nacho Navarro, Eduard Ayguade. ARC 2012, the 8th International Symposium on Applied Reconfigurable Computing (2012).


PPMC : Hardware Scheduling and Memory Management support for Multi Hardware Accelerators. Hussain Tassadaq, Miquel Pericas, Nacho Navarro, Eduard Ayguade. FPL2012 | 22nd International Conference on Field Programmable Logic and Applications.

Programmable Memory Controller for Vector System-on-Chip. Hussain Tassadaq. The seventh Microsoft Research Summer School, Microsoft Research in Cambridge, U.K., from 2 July to 6 July 2012.
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Re: A Programmable Pattern based Memory Controller.

Unread postby nomibucha » Fri Jan 10, 2014 8:21 am

this is very nice and very informative also thanks for the sharing
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