On-Chip Memory System & Hardware support of Data Structure

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On-Chip Memory System & Hardware support of Data Structure

by UCERD.COM » Sat Jul 27, 2013 4:44 am

Abstract— Many data intensive High Performance Computing (HPC) applications may present irregular data structures, irregular control flow and irregular memory accesses.
Current HPC memory systems are designed access regular data, accessing irregular data structures require multiple read/write memory
accesses which affects the performance of the system.
In this paper, we proposed integration of linear and non-linear data structure support in a memory controller called Programmable Memory Controller PPMC.

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Attachments: memories.pdf
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